View MAX9967BGCCQ-BOU-D_3949349.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max9967 dual, low-power, high-speed, pin electron- ics driver/comparator/load (dcl) ic includes, for each channel, a three-level pin driver, a dual comparator, vari- able clamps, and an active load. the driver features a wide voltage range and high-speed operation, includes high-impedance and active-termination (3rd-level drive) modes, and is highly linear even at low-voltage swings. the dual comparator provides low dispersion (timing variation) over a wide variety of input conditions. the clamps provide damping of high-speed device-under- test (dut) waveforms when the device is configured as a high-impedance receiver. the programmable load sup- plies up to 35ma of source and sink current. the load facilitates contact/continuity testing, at-speed parametric testing of ioh and iol, and pullup of high-output-imped- ance devices. the max9967a provides tight matching of gain and off- set for the drivers, and offset for the comparators and active load, allowing reference levels to be shared across multiple channels in cost-sensitive systems. use the max9967b for system designs that incorporate independent reference levels for each channel. the max9967 provides high-speed, differential control inputs with optional internal termination resistors that are compatible with ecl, lvpecl, lvds, and gtl. ecl/lvpecl or flexible open-collector outputs with optional internal pullup resistors are available for the comparators. these features significantly reduce the discrete component count on the circuit board. a 3-wire, low-voltage, cmos-compatible serial interface programs the low-leakage, slew-rate limit, and tri- state/terminate operational configurations of the max9967. the max9967? operating range is -1.5v to +6.5v with power dissipation of only 1.15w per channel. the device is available in a 100-pin, 14mm x 14mm body, and 0.5mm pitch tqfp. an exposed 8mm x 8mm die pad on the top of the package facilitates efficient heat removal. the device is specified to operate with an internal die temperature of +70? to +100?, and features a die temperature monitor output. applications low-cost mixed-signal/system-on-chip ate commodity memory ate pci or vxi programmable digital instruments features ? low power dissipation: 1.15w/channel (typ) ? high speed: 500mbps at 3v p-p ? programmable 35ma active-load current ? low timing dispersion ? wide -1.5v to +6.5v operating range ? active termination (3rd-level drive) ? low leakage mode: 60na ? integrated clamps ? interfaces easily with most logic families ? integrated pmu connection ? digitally programmable slew rate ? internal termination resistors ? low gain and offset error max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ________________________________________________________________ maxim integrated products 1 ordering information 19-3195; rev 1; 2/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package max9967adccq* 0? to +70? 100 tqfp-epr** max9967agccq* 0? to +70? 100 tqfp-epr** max9967alccq 0? to +70? 100 tqfp-epr** max9967amccq* 0? to +70? 100 tqfp-epr** max9967aqccq* 0? to +70? 100 tqfp-epr** max9967arccq* 0? to +70? 100 tqfp-epr** max9967bdccq 0? to +70? 100 tqfp-epr** max9967bgccq 0? to +70? 100 tqfp-epr** max9967blccq 0? to +70? 100 tqfp-epr** max9967bmccq 0? to +70? 100 tqfp-epr** max9967bqccq* 0? to +70? 100 tqfp-epr** max9967brccq 0? to +70? 100 tqfp-epr** * future product?ontact factory for availability. ** epr = exposed pad reversed (top). pin configuration and typical application circuits appear at end of data sheet. selector guide appears at end of data sheet.
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd .........................................................-0.3v to +11.5v v ee to gnd............................................................-7.0v to +0.3v v cc - v ee ................................................................-0.3v to +18v gs to gnd ........................................................... 1v dut_, ldh_, ldl_ to gnd ...................................-2.5v to +7.5v data_, ndata_, rcv_, nrcv_, lden_, nlden_ to gnd ...............................?2.5v to +5.0v data_ to ndata_, rcv_ to nrcv_, lden_ to nlden_............................................?.5v v cco_ to gnd ..........................................................-0.3v to +5v sclk, din, cs , rst , tdata_, trcv_, tlden_ to gnd ..................................?1.0v to +5v dhv_, dlv_, dtv_, chv_, clv_, com_, force_, sense_ to gnd.................................-2.5v to +7.5v cphv_ to gnd ......................................................-2.5v to +8.5v cplv_ to gnd.......................................................-3.5v to +7.5v dhv_ to dlv_........................................................?0v dhv_ to dtv_........................................................?0v dlv_ to dtv_ ........................................................?0v chv_ or clv_ to dut_..........................................?0v ch_, nch_, cl_, ncl_ to gnd (open collector) ....-2.5v to +5v ch_, nch_, cl_, ncl_ to gnd (open emitter) ..(v cco _ + 1.0v) all other pins to gnd ......................(v ee - 0.3v) to (v cc + 0.3v) current out of ch_, nch_, cl_, ncl_ (open emitter) ....+50ma dhv_, dlv_, dtv_, chv_, clv_, cphv_, cplv_ current.....................................??0ma temp current...................................................-0.5ma to +20ma dut_ short circuit to -1.5v to +6.5v..........................continuous power dissipation (t a = +70?) max9967_ _ccq (derate 167mw/? above +70?) ....13.3w* storage temperature range .............................-65? to +150? junction temperature ......................................................+125? lead temperature (soldering, 10s) ....................?.+300? parameter symbol conditions min typ max units power supplies positive supply v cc 9.5 9.75 10.5 v negative supply v ee -6.5 -5.25 -4.5 v v ldh _ = v ldl _ = 0 120 155 positive supply current (note 2) i cc v ldh _ = v ldl _ = 3.5v, load enabled, driver = high impedance 220 255 ma v ldh _ = v ldl _ = 0 -220 -265 negative supply current (note 2) i ee v ldh _ = v ldl _ = 3.5v, load enabled, driver = high impedance -320 -365 ma power dissipation p d (notes 2, 3) 2.3 2.9 w dut_ characteristics operating voltage range v dut (note 4) -1.5 +6.5 v lleak = 0; 0 v dut _ 3v 1.5 leakage current in high- impedance mode i dut lleak = 0; v dut _ = -1.5v, +6.5v 3 ? lleak = 1; 0 v dut _ 3v, t j < +90 c 60 lle ak = 1; v d u t _ = - 1.5v , + 6.5v ; t j < + 90 c 110 lleak = 1; 0 < v dut _ < 3v, v ldl _ = v ldh _ = 3.5v; t j < +90 c 80 leakage current in low-leakage mode lleak = 1; v dut _ = -1.5v, +6.5v; v ldl _ = v ldh _ = 3.5v; t j < +90 c 160 na * dissipation wattage values are based on still air with no heat sink. actual maximum allowable power dissipation is a function o f heat extraction technique and may be substantially higher.
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units driver in term mode (dut_ = dtv_) 4.0 combined capacitance c dut driver in high-impedance mode 8.0 pf low-leakage enable time (notes 5, 6) 20 ? low-leakage disable time (notes 6, 7) 20 ? low-leakage recovery time to return to the specified maximum leakage after a 3v, 4v/ns step at dut_ 4s level programming inputs (dhv_, dlv_, dtv_, chv_, clv_, cphv_, cplv_, com_, ldh_, ldl_) input bias current i bias 25 ? settling time to 0.1% of full-scale change (note 7) 1 s differential control inputs (data_, ndata_, rcv_, nrcv_, lden_, nlden_) input high voltage v ih -1.6 +3.5 v input low voltage v il -2.0 +3.1 v differential input voltage v diff 0.15 1.0 v input bias current max9967_dccq, max9967_mccq 25 ? input termination voltage v tdata _, v trcv _, v tlden _ max9967_gccq, max9967_lccq, and max9967_qccq -2.1 +3.5 v input termination resistor max9967_gccq, max9967_lccq, and max9967_qccq, between signal and corresponding termination voltage input 48 52 ? single-ended control inputs ( cs , sclk, din, rst ) internal threshold reference v thrint 1.05 1.25 1.45 v internal reference output resistance r o 20 k ? external threshold reference v thr 0.43 1.73 v input high voltage v ih v thr + 0.2 3.5 v input low voltage v il -0.1 v thr - 0.2 v input bias current i b 25 ? serial interface timing (figure 6) sclk frequency f sclk 50 mhz sclk pulse-width high t ch 8ns sclk pulse-width low t cl 8ns cs low to sclk high setup t css0 3.5 ns cs high to sclk high setup t css1 3.5 ns
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 4 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units sclk high to cs high hold t csh1 3.5 ns din to sclk high setup t ds 3.5 ns din to sclk high hold t dh 3.5 ns cs pulse width high t cswh 20 ns temperature monitor (temp) nominal voltage t j = +70?, r l 10m ? 3.43 v temperature coefficient +10 mv/? output resistance 15 k ? drivers (note 8) dc output characteristics (r l 10m ? ) max9967a 15 dhv_, dlv_, dtv_, output offset voltage v os at dut_ with v dhv _, v dtv _, v dlv _ independently tested at +1.5v max9967b 100 mv dhv_, dlv_, dtv_, output offset temperature coefficient ?5 ?/ c max9967a (note 9) 0.999 1.00 1.001 dhv_, dlv_, dtv_, gain a v measured with v dhv _, v dlv _, and v dtv _ at 0 and 4.5v max9967b 0.96 1.001 v/v dhv_, dlv_, dtv_, gain temperature coefficient -35 ppm/ c v dut = 1.5v, 3v (note 10) 5 linearity error full range (notes 10, 11) 15 mv dhv_ to dlv_ crosstalk v dlv _ = 0; v dhv _ = 200mv, 6.5v 2mv dlv_ to dhv_ crosstalk v dhv _ = 5v; v dlv _ = -1.5v, +4.8v 2mv dtv_ to dlv_ and dhv_ crosstalk v dhv _ = 3v; v dlv _ = 0; v dtv _ = -1.5v, +6.5v 2mv dhv_ to dtv_ crosstalk v dtv _ = 1.5v; v dlv _ = 0; v dhv _ = 1.6v, 3v 3mv dlv_ to dtv_ crosstalk v dtv _ = 1.5v; v dhv _ = 3v; v dlv _ = 0, 1.4v 3mv dhv_, dtv_, dlv_ dc power- supply rejection ratio psrr (note 12) 40 db maximum dc drive current i dut _ 60 120 ma dc output resistance r dut _i dut _ = 30ma (note 13) 49 50 51 ? i dut _ = 1ma to 8ma 0.5 dc output resistance variation ? r dut _ i dut _ = 1ma to 40ma 1 2.5 ?
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load _______________________________________________________________________________________ 5 electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units sense resistance r sense 7.50 10 13.75 k ? force resistance r force 320 400 500 ? force capacitance c force 2pf dynamic output characteristics (z l = 50 ? ) v dlv _ = 0, v dhv _ = 0.1v 30 v dlv _ = 0, v dhv _ = 1v 40 drive-mode overshoot v dlv _ = 0, v dhv _ = 3v 50 mv term-mode overshoot (note 14) 0 mv settling time to within 25mv 3v step (note 15) 10 ns settling time to within 5mv 3v step (note 15) 20 ns timing characteristics (z l = 50 ? ) (note 16) prop delay, data to output t pdd 2.2 ns prop delay match, t lh vs. t hl 3v p-p 50 ps prop delay match, drivers within package (note 17) 40 ps prop delay temperature coefficient +3 ps/? prop delay change vs. pulse width 3v p-p , 40mhz, 2.5ns to 22.5ns pulse width, relative to 12.5ns pulse width 60 ps prop delay change vs. common- mode voltage v dhv _ - v dlv _ = 1v, v dhv _ = 0 to 6v 85 ps prop delay, drive to high impedance t pddz v dhv _ = 1.0v, v dlv _ = -1.0v, v dtv _ = 0 3.2 ns prop delay, high impedance to drive t pdzd v dhv _ = 1.0v, v dlv _ = -1.0v, v dtv _ = 0 3.3 ns prop delay, drive to term t pddt v dhv _ = 3v, v dlv _ = 0, v dtv _ = 1.5v 2.5 ns prop delay, term to drive t pdtd v dhv _ = 3v, v dlv _ = 0, v dtv _ = 1.5v 2.2 ns dynamic performance (z l = 50 ? ) 0.2v p-p, 20% to 80% 370 1v p-p, 10% to 90% 630 ps 3v p-p, 10% to 90% 1.0 1.3 1.5 rise and fall time t r , t f 5v p-p, 10% to 90% 2.0 ns rise and fall time match t r vs. t f 3v p-p, 10% to 90% 0.03 ns sc1 = 0, sc0 = 1 slew rate percent of full speed (sc0 = sc1 = 0), 3v p-p , 20% to 80% 75 % sc1 = 1, sc0 = 0 slew rate percent of full speed (sc0 = sc1 = 0), 3v p-p , 20% to 80% 50 % sc1 = 1, sc0 = 1 slew rate percent of full speed (sc0 = sc1 = 0), 3v p-p , 20% to 80% 25 %
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 6 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units 0.2v p-p 650 ps 1v p-p 1.0 3v p-p 2.0 minimum pulse width (note 18) 5v p-p 2.9 ns 0.2v p-p 1700 1v p-p 1000 3v p-p 500 data rate (note 19) 5v p-p 350 mbps dynamic crosstalk (note 20) 10 mv p-p rise and fall time, drive to term t dtr , t dtf v dhv _ = 3v, v dlv _ = 0, v dtv _ = 1.5v, 10% to 90%, figure 1a (note 21) 1.6 ns rise and fall time, term to drive t tdr , t tdf v dhv _ = 3v, v dlv _ = 0, v dtv _ = 1.5v, 10% to 90%, figure 1b (note 21) 0.7 ns comparators (note 8) dc characteristics input voltage range v in (note 4) -1.5 +6.5 v differential input voltage v diff 8v hysteresis v hyst 0mv max9967a 20 input offset voltage v os v dut _ = 1.5v max9967b 100 mv input offset voltage temperature coefficient 50 ?/? v dut _ = 0, 3v 47 78 v dut _ = 0, 6.5v 54 78 common-mode rejection ratio (note 22) cmrr v dut _ = -1.5v, +6.5v 44 61 db v dut _ = 1.5v, 3v 3 v dut _ = 6.5v 5 linearity error (note 10) v dut _ = -1.5v 25 mv v cc power-supply rejection ratio (note 12) psrr v dut _ = -1.5v, +6.5v 57 80 db v dut _ = 0, 6.5v 44 64 v ee power-supply rejection ratio (note 12) psrr v dut _ = -1.5v 33 60 db ac characteristics (note 23) max9967_dccq, max9967_gccq, max9967_lccq, max9967_rccq 0.7 minimum pulse width (note 24) t pw ( min ) max9967_mccq, max9967_qccq 0.85 ns prop delay t pdl 2.2 ns prop delay temperature coefficient +6 ps/?
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load _______________________________________________________________________________________ 7 electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units prop delay match, high/low vs. low/high 25 ps prop delay match, comparators within package (note 17) 35 ps v chv _ = v clv _= 0, 6.4v 75 prop delay dispersion vs. common-mode input (note 25) v chv _ = v clv _ = -1.4v 175 ps p r op d el ay d i sper si on vs. over dr i ve 100mv to 1v 220 ps prop delay dispersion vs. pulse width 2.5ns to 22.5ns pulse width, relative to 12.5ns pulse width 40 ps p r op d el ay d i sper si on vs. sl ew rate 0.5v/ns to 2v/ns slew rate 100 ps term mode 250 waveform tracking 10% to 90% v dut _ = 1.0v p-p , t r = t f = 1.0ns, 10% to 90% relative to timing at 50% point high-z mode 500 ps open-collector logic outputs (ch_, nch_, cl_, ncl_: max9967_dccq, max9967_gccq, max9967_lccq, and max9967_rccq) v cco _ voltage range v vcco _ 0 3.5 v output low-voltage compliance set by i ol , r term , and v cco _ -0.5 v output high current i oh max9967_dccq, max9967_gccq -0.05 0 +0.10 ma output low current i ol max9967_dccq, max9967_gccq 7.6 8 8.4 ma output high voltage v oh i ch _ = i nch _ = i cl _ = i ncl _ = 0, max9967_lccq, max9967_rccq v cco_ - 0.05 v cco_ - 0.005 v output low voltage v ol i ch _ = i nch _ = i cl _ = i ncl _ = 0, max9967_lccq, max9967_rccq v cco_ - 0.4 v output voltage swing i ch _ = i nch _ = i cl _ = i ncl _ = 0, max9967_lccq, max9967_rccq 360 390 440 mv output termination resistor r term single-ended measurement from v cco_ to ch_, nch_, cl_, ncl_, max9967_lccq, max9967_rccq 48 52 ? max9967_dccq, max9967_gccq, r term = 50 ? at end of line differential rise time t r 20% to 80% max9967_lccq, max9967_rccq 280 ps max9967_dccq, max9967_gccq, r term = 50 ? at end of line differential fall time t f 20% to 80% max9967_lccq, max9967_rccq 280 ps open-emitter logic outputs (ch_, nch_, cl_, ncl_: max9967_mccq and max9967_qccq) v cco _ voltage range v vcco _ -0.1 +3.5 v v cco _ supply current i vcco _ all outputs 50 ? to (v vcco _ - 2v) 165 ma
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 8 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units output high voltage v oh 50 ? to (v vcco _ - 2v) v cco_ - 1.0 v cco_ - 0.85 v output low voltage v ol 50 ? to (v vcco _ - 2v) v cco_ - 1.7 v cco_ - 1.6 v output voltage swing 50 ? _to (v vcco _ - 2v) 800 850 900 mv differential rise time t r 20% to 80% 370 ps differential fall time t f 20% to 80% 370 ps clamps high clamp input voltage range v cph _ -0.3 +7.5 v low clamp input voltage range v cpl _ -2.5 +5.3 v at dut_ with i dut _ = 1ma, v cphv _ = 0 100 clamp offset voltage v os at dut_ with i dut _ = -1ma, v cplv _ = 0 100 mv offset voltage temperature coefficient 0.5 mv/ c i dut _ = 1ma, v cphv _ = 0 54 clamp power-supply rejection ratio (note 12) psrr i dut _ = -1ma, v cplv _ = 0 54 db voltage gain a v 0.96 1.00 v/v voltage gain temperature coefficient -100 ppm/ c i dut _ = 1ma, v cplv _ = -1.5v, v cphv _ = -0.3v to +6.5v 10 clamp linearity i dut _= -1ma, v cphv _ = 6.5v, v cplv _ = -1.5v to +5.3v 10 mv v cphv _ = 0, v cplv _ = -1.5v, v dut _ = 6.5v 50 95 ma short-circuit output current i scdut _ v cphv _ = 6.5v, v cplv _ = 5v, v dut _ = -1.5v -95 -50 ma clamp dc impedance r out v cphv _ = 3v, v cplv _ = 0, i dut _ = 5ma and 15ma 50 55 ? active load (v com _ = +1.5v, r l > 1m ? , driver in high-impedance mode, unless otherwise noted) com_ voltage range v com _ -1.5 +5.7 v differential voltage range v dut_ - v com_ -7.2 +8.0 v max9967a 15 com_ offset voltage vos i source = i sink = 20ma max9967b 100 mv offset voltage temperature coefficient 50 ?/ c com_ voltage gain a v v com _ = 0, 4.5v, i source = i sink = 20ma 0.98 1.00 v/v voltage gain temperature coefficient 25 ppm/ c
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load _______________________________________________________________________________________ 9 electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units com_ linearity error v com _ = -1.5v, +5.7v; i source = i sink = 20ma (note 10) 3 15 mv com_ output-voltage power- supply rejection ratio psrr v com _ = 2.5v, i source = i sink = 20ma 40 db i source = i sink = 35ma; v dut _ = 3v, 6.5v with v com _ = -1.5v and v dut _ = -1.5v, +2v with v com _ = 5.7v 25 k ? output resistance, sink or source ro i source = i sink = 1ma; v dut _ = 3v, 6.5v with v com _ = -1.5v and v dut _ = -1.5v, +2v with v com _ = 5.7v 500 k ? 10ma, i source = i sink = 35ma, v com _ = 2.5v 6 ? deadband v com _ = 2.5v, 95% i source to 95% i sink 400 700 mv source current (v dut _ = 4.5v) maximum source current v ldl _ = 3.8v 36 40 ma source programming gain a tc v ldl _ = 0.3v, 3v; v ldh = 0.1v 9.9 10 10.1 ma/v max9967a (note 9) 10 50 source current offset (combined offset of ldl_ and gs) i os v ldl _ = 20mv max9967b 0 200 ? source current temperature coefficient i source = 35ma -6 ?/ o c i source = 25ma 70 source current power-supply rejection ratio psrr i source = 35ma 84 ?/v v ldl _ = 100mv, 1v, 2.5v 60 source current linearity (note 26) v ldl _ = 3.5v 130 ? sink current (v dut _ = -1.5v) maximum sink current v ldh _ = 3.8v -40 -36 ma sink programming gain a tc v ldh _ = 0.3v, 3v; v ldl _ = 0.1v -10.1 -10 -9.9 ma/v max9967a (note 9) -50 -10 sink current offset (combined offset of ldh_ and gs) i os v ldh _ = 20mv max9967b -200 0 ? sink current temperature coefficient i sink = 35ma +6 ?/ c i sink = 25ma 70 sink current power-supply rejection ratio psrr i sink = 35ma 84 ? /v
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 10 ______________________________________________________________________________________ note 1: all minimum and maximum limits are 100% production tested. tests are performed at nominal supply voltages unless oth- erwise noted. note 2: total for dual device at worst-case setting. r l > 10m ? . the supply currents are measured with typical supply voltages. note 3: does not include internal dissipation of the comparator outputs. with output loads of 50 ? to (v vcco - 2v), this adds 120mw (typ) to the total device power (max9967_mccq and max9967_qccq). for max9967_lccq, additional power dissipa- tion is typically (32ma x v vcco ). note 4: externally forced voltages may exceed this range provided that the absolute maximum ratings are not exceeded. note 5: transition time from lleak being asserted to leakage current dropping below specified limits. note 6: based on simulation results only. note 7: transition time from lleak being deasserted to output returning to normal operating mode. note 8: with the exception of offset and gain/cmrr tests, reference input values are calibrated for offset and gain. note 9: measured at v cc = +9.75, v ee = -5.25v, and t j = +85?. note 10: relative to straight line between 0 and 4.5v. note 11: specifications measured at the end points of the full range. full ranges are -1.3v v dhv_ 6.5v, -1.5v v dlv_ 6.3v, -1.5v v dtv_ 6.5v. note 12: change in offset voltage with power supplies independently set to their minimum and maximum values. note 13: nominal target value is 50 ? . contact factory for alternate trim selections within the 45 ? to 51 ? range. note 14: v dtv_ = +1.5v, r s = 50 ? . external signal driven into t-line is a 0 to +3v edge with 1.2ns rise time (10% to 90%). measurement is made using the comparator. note 15: measured from the crossing point of data_ inputs to the settling of the driver output. note 16: prop delays are measured from the crossing point of the differential input signals to the 50% point of the expected output swing. rise time of differential inputs data_ and rcv_ is 250ps (10% to 90%). note 17: rising edge to rising edge or falling edge to falling edge. note 18: specified amplitude is programmed. at this pulse width, the output reaches at least 95% of its nominal (dc) amplitude. the pulse width is measured at data_. electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units v ldh _ = 100mv, 1v, 2.5v 60 sink current linearity (note 26) v ldh _ = 3.5v 130 ? ground sense gs voltage range v gs verified by gs common-mode error test 250 mv v dut _ = -1.5v, v gs = 250mv, v ldh _- v gs = 0.1v 25 gs common-mode error v dut _ = +4.5v, v gs = 250mv, v ldl _ - v gs = 0.1v 25 ? gs input bias current v gs = 0 25 ? ac characteristics (z l = 50 ? to gnd) i source = 20ma, v com _ = -1.5v enable time (note 27) t en i sink = 20ma, v com _ = +1.5v 2.2 ns i source = 20ma, v com _ = -1.5v disable time (note 27) t dis i sink = 20ma, v com _ = +1.5v 1.9 ns to 10% 10 current settling time on commutation i source = i sink = 1ma and 35ma (notes 7, 28) to 1.5% 50 ns spike during enable/disable transition i source = i sink = 35ma, v com _ = 0 100 mv
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 11 t ypical operating characteristics note 19: specified amplitude is programmed. maximum data rate is specified in transitions per second. a square wave that reaches at least 95% of its programmed amplitude may be generated at one-half this frequency. note 20: crosstalk from either driver to the other. aggressor channel is driving 3v p-p into a 50 ? load. victim channel is in term mode with v dtv_ = +1.5v. note 21: indicative of switching speed from dhv_ or dlv_ to dtv_ and dtv_ to dhv_ or dlv_ when v dlv_ < v dtv_ < v dhv_ . if v dtv_ < v dlv_ or v dtv_ > v dhv_ , switching speed is degraded by approximately a factor of 3. note 22: change in offset voltage over the input range. note 23: unless otherwise noted, all propagation delays are measured at 40mhz, v dut_ = 0 to +2v, v chv_ = v clv_ = +1v, slew rate = 2v/ns, z s = 50 ? , driver in term mode with v dtv_ = 0. comparator outputs are terminated with 50 ? to gnd at scope input with v cco _ = 2v. open-collector outputs are also terminated (internally or externally) with r term = 50 ? to v cco _. measured from v dut_ crossing calibrated chv_/clv_ threshold to crossing point of differential outputs. note 24: v dut _= 0 to +1v, v chv_ = v clv _= +0.5v. at this pulse width, the output reaches at least 90% of its dc voltage swing. the pulse width is measured at the crossing points of the differential outputs. note 25: relative to propagation delay at v chv_ = v clv_ = +1.5v. v dut_ = 200mv p-p . overdrive = 100mv. note 26: relative to segmented interpolations between 20mv, 200mv, 2v, and 3v. note 27: measured from the crossing point of lden_ inputs to the 10% point of the output voltage change. note 28: v com _= 1.5v, r s = 50 ? , driving voltage = +4v to -1v transition and -1v to +4v transition. settling time is measured from v dut _ = 1.5v to i sink /i source settling within specified tolerance. electrical characteristics (continued) (v cc = +9.75v, v ee = -5.25v, v cco_ = +2.5v, sc1 = sc0 = 0, v cphv_ = +7.2v, v cplv_ = -2.2v, v ldh _ = v ldl _ = 0, v gs = 0, t j = +85 c, unless otherwise noted. all temperature coefficients are measured at t j = +70 c to +100 c, unless otherwise noted.) (note 1) driver small-signal response max9967 toc01 t (2.50ns/div) v dut_ (50mv/div) dlv_ = 0 r l = 50 ? dhv_ = 500mv dhv_ = 200mv 0 dhv_ = 100mv driver large-signal response max9967 toc02 t (2.50ns/div) v dut_ (500mv/div) dlv_ = 0 r l = 50 ? dhv_ = 5v dhv_ = 3v dhv_ = 1v 0 driver trailing edge timing error vs. pulse width max9967 toc03 pulse width (ns) timing error (ps) 20 15 10 5 -80 -60 -40 -20 0 20 40 -100 025 high pulse low pulse normalized to pw = 12.5ns period = 25ns dhv_ = +3v dlv_ = 0 dhv_ 90% 90% t dtf dlv_ t dtr dtv_ 10% 10% figure 1a. drive to term rise and fall time dtv_ dhv_ t tdr dlv_ t tdf 90% 90% 10% 10% figure 1b. term to drive rise and fall time
t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 12 ______________________________________________________________________________________ driver time delay vs. common-mode voltage max9967 toc04 common-mode voltage (v) time delay (ps) 5 4 3 2 1 -25 -15 -5 5 15 25 35 45 55 65 -35 06 normalized to v cm = 1.5v rising edge falling edge drive-to-term transition max9967 toc05 t (2.5ns/div) v dut_ (250mv/div) r l = 50 ? dhv_ to dtv_ dlv_ to dtv_ 0 high impedance to drive transition max9967 toc06 t (2.5ns/div) v dut_ (250mv/div) r l = 50 ? high impedance to dlv_ high impedance to dhv_ 0 driver linearity error vs. output voltage max9967 toc07 v dut_ (v) linearity error (mv) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 -6 -1.5 6.5 dut_ = dhv_ driver linearity error vs. output voltage max9967 toc08 v dut_ (v) linearity error (mv) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 -6 -1.5 6.5 dut_ = dlv_ driver linearity error vs. output voltage max9967 toc09 v dut_ (v) linearity error (mv) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 -6 -1.5 6.5 dut_ = dtv_ crosstalk to dut_ from dlv_ with dut_ = dhv_ max9967 toc10 dlv_ voltage (v) dut_ error (mv) 4.5 3.0 1.5 0 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 1.6 2.0 -2.0 -1.5 6.0 dhv_ = 5v dtv_ = 1.5v normalized at dlv_ = 0 crosstalk to dut_ from dhv_ with dut_ = dlv_ max9967 toc11 dhv_ voltage (v) dut_ error (mv) 5.5 4.5 3.5 2.5 1.5 0.5 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 1.6 2.0 -2.0 -0.5 6.5 dlv_ = 0 dtv_ = 1.5v normalized at dhv_ = 5v crosstalk to dut_ from dtv_ with dut_ = dhv_ max9967 toc12 dtv_ voltage (v) dut_ error (mv) 5.5 4.5 3.5 2.5 1.5 -0.5 0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 -1.5 6.5 dhv_ = 3v dlv_ = 0 normalized at dtv_ = 1.5v
t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 13 crosstalk to dut_ from dtv_ with dut_ = dlv_ max9967 toc13 dtv_ voltage (v) dut_ error (mv) 5.5 4.5 3.5 2.5 1.5 -0.5 0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 -1.5 6.5 dlv_ = 0 dhv_ = 6.5v normalized at dtv_ = 1.5v crosstalk to dut_ from dlv_ with dut_ = dtv_ max9967 toc14 dlv_ voltage (v) dut_ error (mv) 5.5 4.5 3.5 2.5 1.5 -0.5 0.5 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 -2.0 -1.5 6.5 dtv_ = 1.5v dhv_ = 6.5v normalized at dlv_ = 0 crosstalk to dut_ from dhv_ with dut_ = dtv_ max9967 toc15 dhv_ voltage (v) dut_ error (mv) 5.5 4.5 3.5 2.5 1.5 -0.5 0.5 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 -2.0 -2.5 -3.0 -1.5 6.5 dtv_ = 1.5v dlv_ = -1.5v normalized at dhv_ = 3v driver gain vs. temperature max9967 toc16 temperature ( c) gain (v/v) 95 90 85 80 75 70 65 0.9996 0.9998 1.0000 1.0002 1.0004 1.0006 1.0008 0.9994 60 100 normalized at t j = +85 c driver offset vs. temperature max9967 toc17 temperature ( c) offset (mv) 95 90 85 80 75 70 65 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 -1.4 -0.8 -1.2 -1.0 60 100 normalized at t j = +85 c comparator offset vs. common-mode voltage max9967 toc18 common-mode voltage (v) offset (mv) 5.5 4.5 -0.5 0.5 1.5 2.5 3.5 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 -2.0 -1.5 6.5 normalized at v cm = 1.5v and v ee = -5.5v v ee = -6.5v v ee = -4.5v v ee = -5.5v comparator rising-edge timing variation vs. common-mode voltage max9967 toc19 common-mode voltage (v) timing variation (ps) 5.5 4.5 -0.5 0.5 1.5 2.5 3.5 -100 -50 0 50 100 150 -150 -1.5 6.5 normalized at v cm = 1.5v and v ee = -5.25v v ee = -6.5v v ee = -4.5v v ee = -5.5v comparator falling-edge timing variation vs. common-mode voltage max9967 toc20 common-mode voltage (v) timing variation (ps) 5.5 4.5 -0.5 0.5 1.5 2.5 3.5 -100 -50 0 50 100 150 -150 -1.5 6.5 normalized at v cm = 1.5v and v ee = -5.25v v ee = -6.5v v ee = -4.5v v ee = -5.5v comparator timing variation vs. overdrive max9967 toc21 overdrive (v) delay (ps) 0.9 0.8 0.1 0.2 0.3 0.5 0.6 0.4 0.7 -50 0 50 100 150 200 250 300 -100 0 1.0 falling edge rising edge normalized to overdrive = 0.5v
comparator timing variation vs. input slew rate, dut_ rising max9967 toc24 slew rate (v/ns) propagation delay (ps) 2.0 1.5 1.0 -60 -50 -40 -30 -20 -10 0 10 20 30 -70 0.5 2.5 normalized to sr = 1.2v/ns comparator trailing timing error vs. pulse width, max9967_lccq max9967 toc22 pulse width (ns) timing error (ps) 20 15 10 5 -80 -60 -40 -20 0 20 -100 025 high pulse low pulse normalized to pw = 12.5ns period = 25ns t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 14 ______________________________________________________________________________________ max9967 toc23 pulse width (ns) timing error (ps) 20 15 10 5 -50 -40 -30 -20 -10 0 10 20 30 -60 025 comparator trailing-edge timing error vs. pulse width, max9967_mccq normalized to pw = 12.5ns, period = 25ns low pulse high pulse comparator timing variation vs. input slew rate, dut_ falling max9967 toc25 slew rate (v/ns) propagation delay (ps) 2.0 1.5 1.0 -60 -50 -40 -30 -20 -10 0 10 20 30 -70 0.5 2.5 normalized to sr = 1.2v/ns comparator differential output response (max9967_lccq) max9967 toc26 t (2.50ns/div) 0 v out_ (50mv/div) v dut_ = 0 to 3v pulse, chv_ = clv_ = +1.5v, external load = 50 ? comparator differential output response (max9967_mccq) max9967 toc27 v dut = 0 to 3v pulse, chv_ = clv_ = 1.5v, external load = 50 ? v out_ (200mv/div) t (2.50ns/div) 0
t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 15 comparator response high slew-rate overdrive max9967 toc28 t (2.50ns/div) v (500mv/div) high-impedance mode digitized output input 0 input slew rate = 6v/ns comparator offset vs. temperature max9967 toc29 temperature ( c) offset (mv) 95 90 65 70 75 80 85 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 -0.8 60 100 normalized to t j = +85 c clamp response max9967 toc30 t (5.0ns/div) 0 v (500mv/div) dut_ = 0 to 3v square wave r s = 25 ? cplv_ = -0.1v cphv_ = +3.1v rising edge falling edge active-load voltage vs. current max9967 toc31 v dut_ (v) i dut_ (ma) 3.25 3.00 1.75 2.00 2.25 2.50 2.75 -30 -20 -10 0 10 20 30 40 -40 1.50 3.50 com_ = 2.5v ldh_ = 3.5v ldl_ = 3.5v active-load linearity error i dut_ vs. ldh_ max9967 toc32 ldh_ voltage (v) linearity error ( a) 1 0.1 -50 0 50 100 -100 0.01 10 com_ = 1.5v ldl_ = 0 dut_ = -1.5v calibration points at ldh_ = 20mv, 200mv, 2v, 3v active-load linearity error i dut_ vs. ldl_ max9967 toc33 ldl_ voltage (v) linearity error ( a) 1 0.1 -80 -60 -40 -20 0 20 40 60 80 100 -100 0.01 10 com_ = 1.5v ldh_ = 0 dut_ = 4.5v calibration points at ldl_ = 20mv, 200mv, 2v, 3v
t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 16 ______________________________________________________________________________________ high-impedance leakage current vs. dut_ voltage max9967 toc34 v dut_ (v) i dut_ ( a) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 -1.5 6.5 ldh_ = ldl_ = 3.5v ldh_ = ldl_ = 0 low-leakage current vs. dut_ voltage max9967 toc35 v dut_ (v) i dut_ (na) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 -80 -60 -40 -20 0 20 40 60 80 100 -100 -1.5 6.5 ldh_ = ldl_ = 0 ldh_ = ldl_ = 3.5v clamp current vs. difference voltage max9967 toc36 cphv_ voltage (v) i dut_ ( a) 3.9 3.8 3.6 3.7 3.2 3.3 3.4 3.5 3.1 100 200 300 400 500 600 700 800 900 1000 0 3.0 4.0 dut_ = 3v cplv_ = 0 clamp current vs. difference voltage max9967 toc37 i dut_ ( a) -0.25 -0.50 -0.75 -1.00 -1.25 -900 -800 -700 -600 -500 -400 -300 -200 -100 0 100 -1000 -1.50 0 dut_ = 0 cphv_ = 3v cplv_ voltage (v) high-impedance to low-leakage transition max9967 toc38 t (5 s/div) 0 0 i dut_ (250na/div) r l = 100k ? c l = 20pf low leakage to high impedance high impedance to low leakage t = 0 is the rising edge of cs driver reference current vs. driver reference voltage max9967 toc39 input voltage (v) input current ( a) 5.5 4.5 2.5 3.5 0.5 1.5 -0.5 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 0 -1.5 6.5 dlv_ dhv_ dtv_ comparator reference input current vs. input voltage max9967 toc40 input voltage (v) input current (na) 5.5 4.5 -0.5 0.5 1.5 2.5 3.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 -1.5 6.5 dut_ = 6.5v chv_ / clv_ input current vs. input voltage, cphv_ max9967 toc41 cphv_ voltage (v) cphv_ current (na) 5.5 4.5 -0.5 0.5 1.5 2.5 3.5 150 200 250 300 350 400 450 500 100 6.5 7.5 cplv_ = -2.2v input current vs. input voltage, cplv_ max9967 toc42 cplv_ voltage (v) cplv_ current (na) 3.5 2.5 -2.5 -1.5 -0.5 0.5 1.5 -850 -800 -750 -700 -650 -600 -900 4.5 5.5 cphv_ = 7.2v
t ypical operating characteristics (continued) max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 17 load references input currents vs. input voltage max9967 toc43 input voltage (v) input current (na) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 -650 -600 -550 -500 -450 -400 -700 0 4.0 ldh ldl input currents vs. input voltage, com_ max9967 toc44 com_ voltage (v) com_ current ( a) 4.5 3.0 0 1.5 0.825 0.850 0.875 0.900 0.925 0.950 0.975 1.000 0.800 -1.5 6.0 supply current, i cc vs. v cc max9967 toc45 v cc ( v) i cc (ma) 10.4 10.3 10.1 10.2 9.7 9.8 9.9 10.0 9.6 25 50 75 100 125 150 175 200 225 250 0 9.5 10.5 c d a b r l = 10k ? , c l = 0.5pf, v ee = - 5.25v a: dut_ = dtv_ = 1.5v, dhv_ = 3v, dlv_ = 0, chv_ = clv_ = 0, cphv_ = 7.2v, cplv_ = -2.2v, ldh_ = ldl_ = 0 i source = i sink = 0 b: same as a except driver disabled high-z and load enabled c: same as b except i source = i sink = 35ma d: same as c except low-leakage mode asserted supply current, i ee vs. v ee max9967 toc46 v ee ( v) i ee (ma) -4.50 -5.00 -4.75 -6.00 -5.75 -5.50 -5.25 -6.25 -330 -310 -290 -270 -250 -230 -210 -190 -170 -150 -350 -6.50 a: dut_ = dtv_ = 1.5v, dhv_ = 3v, dlv_ = 0, chv_ = clv_ = 0, cphv_ = 7.2v, cplv_ = -2.2v, ldh_ = ldl_ = 0 i source = i sink = 0 b: same as a except driver disabled high-z and load enabled c: same as b except i source = i sink = 35ma d: same as c except low-leakage mode asserted r l = 10k ? , c l = 0.5pf, v cc = 9.75v c d a b i cc vs. temperature max9967 toc47 temperature ( c) supply current (ma) 105 100 90 95 70 75 80 85 65 116 117 118 119 120 121 122 123 124 125 115 60 110 dut_ = dtv_ = 1.5v, dhv_ = 3v, dlv_ = 0 chv_ = clv_ = 0, cphv_ = 7.2v cplv_ = -2.2v, ldh_ = ldl_ = 0 v cc = 9.75v, v ee = -5.25v i ee vs. temperature max9967 toc48 temperature ( c) supply current (ma) 105 100 90 95 70 75 80 85 65 -228 -226 -224 -222 -220 -218 -216 -214 -212 -210 -230 60 110 dut_ = dtv_ = 1.5v, dhv_ = 3v, dlv_ = 0 chv_ = clv_ = 0, cphv_ = 7.2v cplv_ = -2.2v, ldh_ = ldl_ = 0 v cc = 9.75v, v ee = -5.25v
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 18 ______________________________________________________________________________________ pin name function 1 temp temperature monitor output 2, 9, 12, 14, 17, 24, 35, 45, 46, 60, 80, 81, 91 v ee negative power-supply input 3, 5, 10, 16, 21, 23, 25, 34, 43, 44, 82, 83, 92 gnd ground connection 4, 11, 15, 22, 33, 41, 42, 66, 84, 85, 93 v cc positive power-supply input 6 force1 channel 1 force input from external pmu 7 dut1 channel 1 device-under-test input/output. combined i/o for driver, comparator, clamp, and load. 8 sense1 channel 1 sense output to external pmu 13 gs ground sense. gs is the ground reference for ldh_ and ldl_. 18 sense2 channel 2 sense output to external pmu 19 dut2 channel 2 device-under-test input/output. combined i/o for driver, comparator, clamp, and load. 20 force2 channel 2 force input from external pmu 26 clv2 channel 2 low comparator reference input 27 chv2 channel 2 high comparator reference input 28 dlv2 channel 2 driver low reference input 29 dtv2 channel 2 driver termination reference input 30 dhv2 channel 2 driver high reference input 31 cplv2 channel 2 low-clamp reference input 32 cphv2 channel 2 high-clamp reference input 36 nch2 37 ch2 channel 2 comparator high output. differential output of channel 2 high comparator. 38 v cco2 channel 2 collector voltage input. voltage for channel 2 comparator output pullup resistors. for open-collector outputs, this is the pullup voltage for the internal termination resistors. for open- emitter outputs, this is the collector voltage of the output transistors. not internally connected on open-collector versions without internal termination resistors. 39 ncl2 40 cl2 channel 2 comparator low output. differential output of channel 2 low comparator. 47 com2 channel 2 active-load commutation voltage reference input 48 ldl2 channel 2 active-load source current reference input 49 ldh2 channel 2 active-load sink current reference input 50, 76 n.c. no connect. make no connection. 51 tdata2 channel 2 data termination voltage input. termination voltage input for the data2 and ndata2 differential inputs. not internally connected on versions without internal termination resistors. 52 ndata2 53 data2 channel 2 multiplexer control inputs. differential controls data2 and ndata2 select driver 2? input from dhv2 or dlv2. drive data2 above ndata2 to select dhv2. drive ndata2 above data2 to select dlv2. pin description
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 19 pin name function 54 trcv2 channel 2 rcv termination voltage input. termination voltage input for the rcv2 and nrcv2 differential inputs. not internally connected on versions without internal termination resistors. 55 nrcv2 56 rcv2 channel 2 multiplexer control inputs. differential controls rcv2 and nrcv2 place channel 2 into receive mode. drive rcv2 above nrcv2 to place channel 2 into receive mode. drive nrcv2 above rcv2 to place channel 2 into drive mode. 57 tlden2 channel 2 load enable termination voltage input. termination voltage input for the lden2 and nlden2 differential inputs. not internally connected on versions without internal termination resistors. 58 nlden2 59 lden2 channel 2 multiplexer control inputs. differential controls lden2 and nlden2 enable/disable the active load. drive lden2 above nlden2 to enable the channel 2 active load. drive nlden2 above lden2 to disable the channel 2 active load. 61 rst reset input. asynchronous reset input for the serial register. rst is active low and asserts low-leakage mode. at power-up, hold rst low until v cc and v ee have stabilized. 62 cs chip-select input. serial port activation input. cs is active low. 63 thr single-ended logic threshold. leave thr unconnected to set the threshold to +1.25v or force thr to a desired threshold voltage. 64 sclk serial-clock input. clock for serial port. 65 din data input. serial port data input. 67 lden1 68 nlden1 channel 1 multiplexer control inputs. differential controls lden1 and nlden1 enable/disable the active load. drive lden1 above nlden1 to enable the channel 1 active load. drive nlden1 above lden1 to disable the channel 1 active load. 69 tlden1 channel 1 load enable termination voltage input. termination voltage input for the lden1 and nlden1 differential inputs. not internally connected on versions without internal termination resistors. 70 rcv1 71 nrcv1 channel 1 multiplexer control inputs. differential controls rcv1 and nrcv1 place channel 1 into receive mode. drive rcv1 above nrcv1 to place channel 1 into receive mode. drive nrcv1 above rcv1 to place channel 1 into drive mode. 72 trcv1 channel 1 rcv termination voltage input. termination voltage input for the rcv1 and nrcv1 differential inputs. not internally connected on versions without internal termination resistors. 73 data1 74 ndata1 channel 1 multiplexer control inputs. differential controls data1 and ndata1 select driver 1? input from dhv1 or dlv1. drive data1 above ndata1 to select dhv1. drive ndata1 above data1 to select dlv1. 75 tdata1 channel 1 data termination voltage input. termination voltage input for the data1 and ndata1 differential inputs. not internally connected on versions without internal termination resistors. 77 ldh1 channel 1 active-load sink current reference input 78 ldl1 channel 1 active-load source current reference input 79 com1 channel 1 active load commutation voltage reference input 86 cl1 87 ncl1 channel 1 low comparator output. differential output of channel 1 low comparator. pin description (continued)
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 20 ______________________________________________________________________________________ detailed description the max9967 dual, low-power, high-speed, pin elec- tronics dcl ic includes, for each channel, a three-level pin driver, a dual comparator, variable clamps, and an active load. the driver features a -1.5v to +6.5v operat- ing range and high-speed operation, includes high- impedance and active-termination (3rd-level drive) modes, and is highly linear even at low voltage swings. the dual comparator provides low dispersion (timing variation) over a wide variety of input conditions. the clamps provide damping of high-speed dut_ wave- forms when the device is configured as a high-imped- ance receiver. the programmable load supplies up to 35ma of source and sink current. the load facilitates contact/continuity testing, at-speed parametric testing of ioh and iol, and pullup of high output-impedance devices. the max9967a provides tight matching of gain and off- set for the drivers and offset for the comparators and active load, allowing reference levels to be shared across multiple channels in cost-sensitive systems. use the max9967b for system designs that incorporate independent reference levels for each channel. optional internal resistors at the high-speed inputs pro- vide compatibility with ecl, lvpecl, lvds, and gtl interfaces. connect the termination voltage inputs (tdata_, trcv_, tlden_) to the appropriate voltage for terminating ecl, lvpecl, gtl, or other logic. leave the inputs unconnected for 100 ? differential lvds termination. in addition, ecl/lvpecl or flexible open-collector outputs with optional internal pullup resistors are available for the comparators. these fea- tures significantly reduce the discrete component count on the circuit board. a 3-wire, low-voltage, cmos-compatible serial inter- face programs the low-leakage, load-disable, slew-rate, and tri-state/terminate operational configurations of the max9967. output driver the driver input is a high-speed multiplexer that selects one of three voltage inputs: dhv_, dlv_, or dtv_. this switching is controlled by high-speed inputs data_ and rcv_ and mode control bit tmsel (table 1). a slew-rate circuit controls the slew rate of the buffer input. select one of four possible slew rates according to table 2. the speed of the internal multiplexer sets the100% driver slew rate (see the driver large-signal response graph in the typical operating characteristics ). pin name function 88 v cco1 channel 1 collector voltage input. voltage for channel 1 comparator output pullup resistors. for open-collector outputs, this is the pullup voltage for the internal termination resistors. for open- emitter outputs, this is the collector voltage of the output transistors. not internally connected on open-collector versions without internal termination resistors. 89 ch1 90 nch1 channel 1 high comparator high output. differential output of channel 1 high-side comparator. 94 cphv1 channel 1 high-clamp reference input 95 cplv1 channel 1 low-clamp reference input 96 dhv1 channel 1 driver high reference input 97 dtv1 channel 1 driver termination reference input 98 dlv1 channel 1 driver low reference input 99 chv1 channel 1 high-comparator reference input 100 clv1 channel 1 low-comparator reference input pin description (continued)
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 21 one of two identical channels shown buffer 50 ? dtv_ dhv_ dlv_ d ata_ nd ata_ rcv_ nrcv_ cphv_ cplv_ chv_ ch_ nch_ cl_ ncl_ clv_ 4 x 50 ? optional comparators clamps dut_ sclk cs v cc v ee gnd temp sc1 sc0 tmsel v cco_ din serial interface serial interface is common to both channels. mode bits independently latched for each channel. sc1 sc0 tmsel slew- rate control optional lleak lleak high-z multiplexer active- load control lden_ nlden_ tlden_ com_ ldh_ ldl_ gs v cc v ee lddis ldcal lddis ldcal thr force_ sense_ td ata_ trcv_ lleak sink (high) current source (low) current 10k ? 400 ? ch_ mode bits gs active load rst optional r d ata_ = 5o ? optional r rcv_ = 5o ? r lden_ 50 ? optional functional diagram
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 22 ______________________________________________________________________________________ dut_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed into low-leakage mode (figure 2, table 1). in high- impedance mode, the clamps are connected. high- speed input rcv_ and mode control bits tmsel and lleak control the switching. in high-impedance mode, the bias current at dut_ is less than 1.5? over the 0 to 3v range, while the node maintains its ability to track high-speed signals. in low-leakage mode, the bias cur- rent at dut_ is further reduced to less than 50na, and signal tracking slows. see the low-leakage mode, lleak section for more details. the nominal driver output resistance is 50 ? . contact the factory for different resistance values within the 45 ? to 51 ? range. clamps configure the voltage clamps (high and low) to limit the voltage at dut_ and to suppress reflections when the channel is configured as a high-impedance receiver. the clamps behave as diodes connected to the out- puts of high-current buffers. internal circuitry compen- sates for the diode drop at 1ma clamp current. set the clamp voltages using the external connections cphv_ and cplv_. the clamps are enabled only when the dri- ver is in the high-impedance mode (figure 2). for tran- sient suppression, set the clamp voltages to approximately the minimum and maximum expected dut_ voltage range. the optimal clamp voltages are application specific and must be empirically deter- mined. if clamping is not desired, set the clamp volt- ages at least 0.7v outside the expected dut_ voltage range; overvoltage protection remains active without loading dut_. comparators the max9967 provides two independent high-speed comparators for each channel. each comparator has one input connected internally to dut_ and the other input connected to either chv_ or clv_ (see the functional diagram ). comparator outputs are a logical result of the input conditions, as indicated in table 3. three configurations are available for the comparator differential outputs to ease interfacing with a wide vari- ety of logic families. an open-collector configuration switches an 8ma current source between the two out- puts. this configuration is available with and without internal termination resistors connected to v cco_ (figure 3). for open-collector versions without internal termination, leave v cco _ unconnected and add the required external resistors. these resistors are typically 50 ? to the pullup voltage at the receiving end of the output trace. alternate configurations may be used, provided that the absolute maximum ratings are not exceeded. for open-collector versions with internal ter- mination, connect v cco _ to the desired v oh voltage. slew rate dlv_ dhv_ dtv_ d ata_ rcv_ mode buffer 50 ? dut_ 4 tmsel sc0 sc1 lleak cphv_ cplv_ high-z 0 0 0 0 1 1 1 high- speed inputs reference inputs comparators active load clamps figure 2. simplified driver channel
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 23 each output provides a nominal 400mv p-p swing and 50 ? source termination. an open-emitter configuration is also available (figure 4). connect an external collector voltage to v cco _ and add external pulldown resistors. these resistors are typically 50 ? to v cco _ - 2v at the receiving end of the output trace. alternate configurations may be used provided that the absolute maximum ratings are not exceeded. active load the active load consists of linearly programmable source and sink current sources, a commutation buffer, and a diode bridge (see functional diagram ). analog reference inputs ldh_ and ldl_ program the sink and source currents, respectively, within the 0 to 35ma range. analog reference input com_ sets the commuta- tion buffer output voltage. the source and sink naming convention is referenced to the device under test. current out of the max9967 constitutes sink current and current into the max9967 constitutes source current. the programmed source (low) current loads the device under test when v dut _ > v com _. the programmed sink (high) current loads the device under test when v dut _ < v com _. the gs input allows a single level-setting dac, such as the max5631 or max5734, to program the max9967? active load, driver, comparator, and clamps. although all of the dac levels are typically offset by v gs , the operation of the max9967? ground-sense input nulli- fies this offset with respect to the active-load currents. connect gs to the ground reference used by the dac. (v ldl _ - v gs ) sets the source current by +10ma/v. (v ldh _ - v gs ) sets the sink current by -10ma/v. the high-speed differential input lden_ and 3 bits of the control word (ldcal, lddis, and lleak) control the load (table 4). when the load is enabled, the inter- nal source and sink current sources connect to the diode bridge. when the load is disabled, the internal current sources shunt to ground and the top and bot- tom of the bridge float (see the functional diagram ). lleak places the load in low-leakage mode. lleak overrides lden_, lddis, and ldcal. see the low- leakage mode, lleak section for more detailed infor- mation. lddis and ldcal in some tester configurations, the load enable is driven with the complement of the driver high-impedance signal (rcv_), so disabling the driver enables the load and vice versa. the lddis and ldcal signals disable and enable the load independently of the state of lden_. this allows the load and driver to be simultaneously enabled and dis- abled for diagnostic purposes (table 4). low-leakage mode, lleak asserting lleak through the serial port or with rst places the max9967 into a very low-leakage state (see the electrical characteristics ). the comparators func- tion at full speed, but the driver, clamps, and active load are disabled. this mode is convenient for making iddq and pmu measurements without the need for an output disconnect relay. lleak is programmed inde- pendently for each channel. when dut_ is driven with a high-speed signal while lleak is asserted, the leakage current momentarily increases beyond the limits specified for normal opera- tion. the low-leakage recovery specification in the electrical characteristics table indicates device behav- ior under this condition. external connections internal control register data_ rcv_ tmsel lleak driver output 10 x0 drive to dhv_ 00 x0 drive to dlv_ x 110 drive to dtv_ (term mode) x 100 high-impedance (high-z) mode xxx 1 low-leakage mode table 1. driver logic sc1 sc0 driver slew rate (%) 00 100 01 75 10 50 11 25 table 2. slew-rate logic dut_ > chv_ dut_ > clv_ ch_ cl_ 0000 0101 1010 1111 table 3. comparator logic
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 24 ______________________________________________________________________________________ clv_ chv_ dut_ ch_ nch_ v ee 8ma v ee 8ma cl_ ncl_ v cco_ 4 x 50 ? optional figure 3. open-collector comparator outputs v cco_ clv_ chv_ dut_ ch_ nch_ cl_ ncl_ 106 ? 106 ? 106 ? 106 ? figure 4. open-emitter comparator outputs
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 25 external connections internal control register lden_ ldcal lddis lleak mode 00 00 normal operating mode, load disabled 10 00 normal operating mode, load enabled x1 00 load enabled for diagnostics xx 10 load disabled xx x1 low-leakage mode table 4. active load programming sclk din 01234567 enable f/f dq enable f/f dq enable 5 5 7 6 shift register lddis, ldcal, tmsel, sc0, sc1 channel 1 f/f d q enable f/f dq enable 0-4 0-4 7 6 5 5 1 1 mode bits channel 2 mode bits lleak lddis, ldcal, tmsel, sc0, sc1 lleak thr 20k ? v thrint = 1.25v cs rst set set figure 5. serial interface
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 26 ______________________________________________________________________________________ serial interface and device control a cmos-compatible serial interface controls the max9967 modes (figure 5). control data flow into an 8- bit shift register (msb first) and are latched when cs is taken high, as shown in figure 6. latches contain 6 con- trol bits for each channel of the dual pin driver. data from the shift register are loaded to either or both of the latches as determined by bits d6 and d7, and indicated in figure 5 and table 5. the control bits, in conjunction with external inputs data_ and rcv_, manage the fea- tures of each channel, as shown in tables 1 and 2. rst sets lleak = 1 for both channels, forcing them into low- leakage mode. all other bits are unaffected. at power- up, hold rst low until v cc and v ee have stabilized. analog control input thr sets the threshold for the input logic, allowing operation with cmos logic as low as 0.9v. leaving thr unconnected results in a nominal threshold of 1.25v from an internal reference, providing compatibility with 2.5 to 3.3v logic. sclk din d7 d6 d5 d4 d3 d2 d1 d0 t ch t css0 t oh t cl t css1 t csh1 t cswh t ds cs figure 6. serial-interface timing bit name description d7 ch1 channel 1 write enable. set to 1 to update the control byte for channel 1. set to 0 to make no changes to channel 1. d6 ch2 channel 2 write enable. set to 1 to update the control byte for channel 2. set to 0 to make no changes to channel 2. d5 lleak low-leakage select. set to 1 to put driver, load, and clamps into low-leakage mode. comparators remain active in low-leakage mode. set to 0 for normal operation. d4 tmsel driver termination select. set to 1 to force the driver output to the dtv_ voltage when rcv_ = 1 (term). set to 0 to place the driver into high-impedance mode when rcv_ = 1 (high-z). see table 1. d3 sc1 d2 sc0 driver slew-rate select. sc1 and sc0 set the driver slew rate. see table 2. d1 lddis load disable. set lddis to 1 to disable the load. set to 0 for normal operation. see table 4. d0 ldcal load calibrate. overrides lden to enable load. set ldcal to 1 to enable load. set ldcal to 0 for normal operation. see table 4. table 5. shift-register functions
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 27 temperature monitor the max9967 supplies a temperature output signal, temp, that asserts a nominal output voltage of 3.43v at a die temperature of +70? (343k). the output voltage increases proportionately with temperature. heat removal under normal circumstances, the max9967 requires heat removal through the exposed pad by use of an external heat sink. the exposed pad is electrically at v ee potential, and must be either connected to v ee or isolated. power dissipation is highly dependent upon the appli- cation. the electrical characteristics table indicates power dissipation under the condition that the source and sink currents are programmed to 0ma. maximum dissipation occurs when the source and sink currents are both at 35ma, the v dut_ is at an extreme of the voltage range (-1.5v or +6.5v), and the diode bridge is fully commutated. under these conditions, the addition- al power dissipated (per channel) is: if the dut is sourcing current, ? p d = (v dut _- v ee ) x i source + (v cc - v ee ) x i sink. if the dut is sinking current, ? p d = (v cc - v dut _) x i sink + (v cc - v ee ) x i source. the dut sources the programmed (low) current when v dut _> v com _. the path of the current is from the dut through the outside of the diode bridge and the source (low) current source to v ee . the programmed sink current flows from v cc through the sink (high) cur- rent source, the inside of the diode bridge, and the commutation buffer to v ee . the dut sinks the programmed (high) current when v dut _< v com _. the path of the current is from v cc through the sink (high) current source and the outside of the diode bridge to the dut. the programmed source current flows from v cc through the commutation buffer, the inside of the diode bridge, and the source (low) current source to v ee . theta j-c of the exposed-pad package is very low, approximately 3 c/w to 4 c/w. die temperature is thus highly dependent upon the heat-removal techniques used in the application. maximum total power dissipation occurs under the fol- lowing conditions: ? cc = +10.5v ? ee = -6.5v ? source = i sink = 35ma for both channels load enabled ? dut _ = +6.5v ? com _ < +5.5v under these extreme conditions, the total power dissi- pation is approximately 6w. if the die temperature can- not be maintained at an acceptable level under these conditions, use software clamping to limit the load out- put currents to lower values and/or reduce the supply voltages. chip information transistor count: 5656 process: bipolar
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load 28 ______________________________________________________________________________________ t ypical application circuits (simplified) rxa rb-re rcom in msr rxd main amp dhv dtv dlv sense ~45 ? dut to adc driver = dtv interfacing to pmu without external relays. dcl sourcing up to 60ma. reference inputs reference input pmu max9949f max9950f dcl max9967 sense force force 400 ? 10k ? current- sense amp rxa rcom in msr rxd main amp dhv dtv dlv sense ~45 ? dut to adc driver in low-leakage mode interfacing to pmu without external relays. pmu sourcing 2ma or less. reference inputs reference input rb-re current- sense amp pmu max9949f max9950f dcl max9967 sense force force 400 ? 10k ?
max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load ______________________________________________________________________________________ 29 high-speed digital input termination part accuracy grade comparator output type comparator output termination rcv_ data_ lden_ heat extraction max9967adccq a open collector none none none none top max9967agccq a open collector none 100 100 100 top max9967alccq a open collector 50 ? to v cco_ 100 100 100 top max9967amccq a open emitter ecl/lvpecl none none none top max9967aqccq a open emitter ecl/lvpecl 100 100 100 top max967arccq a open collector 50 ? to v cco_ none 100 100 top max9967bdccq b open collector none none none none top max9967bgccq b open collector none 100 100 100 top max9967blccq b open collector 50 ? to v cco_ 100 100 100 top max9967bmccq b open emitter ecl/lvpecl none none none top max9967bqccq b open emitter ecl/lvpecl 100 100 100 top max9967brccq b open collector 50 ? to v cco_ none 100 100 top selector guide
1 75 2 74 3 73 4 72 5 71 6 70 7 69 8 68 9 67 10 66 11 65 12 64 13 63 14 62 15 61 16 60 17 59 18 58 19 57 20 56 21 55 22 54 23 53 24 52 25 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 temp gnd v cc v cc v cc v cc gnd v ee v ee v ee v ee v ee v ee gnd gnd gnd gnd gnd gnd v cc v cc v cc v ee v ee v ee gnd gnd v ee v cc gnd gnd v ee v ee v ee gnd v cc v cc v cc force1 dut1 sense1 gs sense2 dut2 force2 clv2 chv2 dlv2 dtv2 dhv2 cplv2 cphv2 nch2 ch2 v cco2 ncl2 cl2 com2 ldl2 ldh2 n.c. td ata2 nd ata2 d ata2 trcv2 nrcv2 rcv2 tlden2 nlden2 lden2 thr sclk din lden1 nlden1 tlden1 rcv1 nrcv1 trcv1 d ata1 nd ata1 td ata1 n.c. ldh1 ldl1 com1 cl1 ncl1 v cco1 ch1 nch1 cphv1 cplv1 dhv1 dtv1 dlv1 chv1 clv1 cs rst max9967 pin configuration max9967 dual, low-power, 500mbps ate driver/comparator with 35ma load maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 30 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information for the latest package outline information, go to www.maxim-ic.com/packages .
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max9967 part number table notes: see the max9967 quickview data sheet for further information on this product family or download the max9967 full data sheet (pdf, 676kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max9967blevkit rohs/lead-free: no max9967bgc c q-bou+d 0c to +70c rohs/lead-free: yes max9967bgc c q-bou-d 0c to +70c rohs/lead-free: no max9967brc c q+td -20c to +85c rohs/lead-free: yes max9967alc c q+td -20c to +85c rohs/lead-free: yes max9967bmc c q-td -20c to +85c rohs/lead-free: no max9967bdc c q+td -20c to +85c rohs/lead-free: yes
max9967bgc c q+d -20c to +85c rohs/lead-free: yes max9967bgc c q+td -20c to +85c rohs/lead-free: yes max9967bdc c q-td -20c to +85c rohs/lead-free: no max9967brc c q-td -20c to +85c rohs/lead-free: no max9967alc c q-td -20c to +85c rohs/lead-free: no max9967blc c q+td -20c to +85c rohs/lead-free: yes max9967adc c q-td -20c to +85c rohs/lead-free: no max9967bmc c q+td -20c to +85c rohs/lead-free: yes max9967blc c q-td -20c to +85c rohs/lead-free: no max9967adc c q+td -20c to +85c rohs/lead-free: yes max9967brc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967adc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967brc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967adc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967bmc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967alc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis
max9967blc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967bdc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967bgc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967bgc c q-td tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967bmc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis max9967bdc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967alc c q+d tqfp;100 pin;14x14x1.0mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e+8r * -20c to +85c rohs/lead-free: yes materials analysis max9967blc c q-d tqfp;100 pin;14x14x1mm dwg: 21-0148a (pdf) use pkgcode/variation: c 100e-8r * -20c to +85c rohs/lead-free: no materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

▲Up To Search▲

Price & Availability of MAX9967BGCCQ-BOU-D

	To Download MAX9967BGCCQ-BOU-D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .